1. Field of the Invention
The present invention relates to integrated circuit structures. More specifically, the present invention relates to integrated circuit structures formed by damascene processes.
2. Description of the Related Art
Integrated circuit structures comprising certain metals, such as aluminum, can be formed by depositing a layer of the metal on a substrate, patterning the metal with photoresist, and selectively dry etching the metal to form the desired structure. Other metals, such as copper, can be difficult to dry etch. Nevertheless, integrated circuit structures can be formed from such metals by using a damascene process. In a damascene process, a layer of insulating material is deposited on a substrate, patterned with photoresist, and selectively etched to form trenches or cavities for the desired metallic structures. The metal can then be deposited on the insulating layer to overfill the trenches or cavities, and the excess metal can be removed by polishing down to the surface of the insulating layer.
One example of an integrated circuit structure commonly formed using a damascene process is a conductive line in a magnetic random access memory (MRAM) device. An MRAM device typically comprises a plurality of magnetic memory cells organized into an array having any of a wide variety of configurations. One exemplary configuration is a “cross-point” memory array, which comprises a first set of parallel conductive lines covered by an insulating layer, over which lies a second set of parallel conductive lines, perpendicular to the first lines. One set of conductive lines is referred to as the “bit” lines, and the other set of conductive lines is referred to as the “word” lines. The magnetic memory cells can be sandwiched between the bit lines and the word lines at their intersections. Due to the high current demands of an MRAM device, the bit lines and word lines of the array are often made of copper.
When current flows through a bit line or a word line, it generates a magnetic field around the line. In a typical MRAM device, the state of a given memory cell can be switched by flowing current through the word line and the bit line corresponding to the memory cell. The sum of the two generated fields is sufficient to switch or “flip” the bit.
However, as the density of magnetic memory cells within an array increases, so does the possibility of cross talk between a bit line or a word line and nearby memory cells, which can cause unintended switching of memory cells. To reduce the likelihood of such cross talk, it is desirable to localize the magnetic field generated by a word line or a bit line carrying current. One approach for localizing this magnetic field is to surround each word line and bit line within an MRAM array with a magnetic keeper. For example, U.S. Pat. No. 6,413,788, which is hereby incorporated by reference in its entirety, discloses a variety of magnetic keeper configurations and methods of forming such magnetic keepers.